contador 60
library ieee;
use ieee.std_logic_1164.all;
entity contador60 is
port ( clock, enable : in bit;
unidade :out integer range 0 to 9;
dezena :out integer range 0 to 5;
tc :out bit);
end contador60;
architecture circuito of contador60 is
begin
process (clock) -- responde ao clock
variable uni :integer range 0 to 9;
variable dez :integer range 0 to 5;
begin
if (clock = '1' and clk'event) then
if enable = '1' then
if (uni<9) and (dez = 0) then
uni := uni + 1;
elsif (uni = 9) then
uni := '0';
dez := '0';
elsif (dez = 1) and (uni < 5) then
dez := dez + 1;
elsif (dez = 5) and (uni = 9) then
uni := '0';
dez := '0';
tc := '1';
end if
end if
unidade <= uni;
dezena <= dez;
end process;
end circuito;